arne/cheapino_qmk_firmware
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'qmk/master' into merge-2025-03-22

Browse Source
This commit is contained in:
Ilya Zhuravlev
2025-03-22 23:00:09 -06:00
parent 94922899b0 6a947fa534
commit 6aedbad57c
736 changed files with 18949 additions and 5211 deletions
Download Patch File Download Diff File Expand all files Collapse all files

51
platforms/avr/drivers/i2c_master.h
View File

@@ -1,51 +0,0 @@
/* Copyright (C) 2019 Elia Ritterbusch
+
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
/* Library made by: g4lvanix
* GitHub repository: https://github.com/g4lvanix/I2C-master-lib
*/
#pragma once
#include <stdint.h>
// ### DEPRECATED - DO NOT USE ###
#define i2c_writeReg(devaddr, regaddr, data, length, timeout) i2c_write_register(devaddr, regaddr, data, length, timeout)
#define i2c_writeReg16(devaddr, regaddr, data, length, timeout) i2c_write_register16(devaddr, regaddr, data, length, timeout)
#define i2c_readReg(devaddr, regaddr, data, length, timeout) i2c_read_register(devaddr, regaddr, data, length, timeout)
#define i2c_readReg16(devaddr, regaddr, data, length, timeout) i2c_read_register16(devaddr, regaddr, data, length, timeout)
// ###############################
#define I2C_READ 0x01
#define I2C_WRITE 0x00
typedef int16_t i2c_status_t;
#define I2C_STATUS_SUCCESS (0)
#define I2C_STATUS_ERROR (-1)
#define I2C_STATUS_TIMEOUT (-2)
#define I2C_TIMEOUT_IMMEDIATE (0)
#define I2C_TIMEOUT_INFINITE (0xFFFF)
void i2c_init(void);
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_transmit_P(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_write_register(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_write_register16(uint8_t devaddr, uint16_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_read_register(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_read_register16(uint8_t devaddr, uint16_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_ping_address(uint8_t address, uint16_t timeout);

68
platforms/avr/drivers/spi_master.h
View File

@@ -1,68 +0,0 @@
/* Copyright 2020
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#pragma once
#include <stdbool.h>
#include "gpio.h"
typedef int16_t spi_status_t;
// Hardware SS pin is defined in the header so that user code can refer to it
#if defined(__AVR_AT90USB162__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
# define SPI_SS_PIN B0
#elif defined(__AVR_ATmega32A__)
# define SPI_SS_PIN B4
#elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__)
# define SPI_SS_PIN B2
#endif
#define SPI_STATUS_SUCCESS (0)
#define SPI_STATUS_ERROR (-1)
#define SPI_STATUS_TIMEOUT (-2)
#define SPI_TIMEOUT_IMMEDIATE (0)
#define SPI_TIMEOUT_INFINITE (0xFFFF)
#ifdef __cplusplus
extern "C" {
#endif
typedef struct spi_start_config_t {
pin_t slave_pin;
bool lsb_first;
uint8_t mode;
uint16_t divisor;
bool cs_active_low;
} spi_start_config_t;
void spi_init(void);
bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor);
bool spi_start_extended(spi_start_config_t *start_config);
spi_status_t spi_write(uint8_t data);
spi_status_t spi_read(void);
spi_status_t spi_transmit(const uint8_t *data, uint16_t length);
spi_status_t spi_receive(uint8_t *data, uint16_t length);
void spi_stop(void);
#ifdef __cplusplus
}
#endif

39
platforms/avr/drivers/uart.h
View File

@@ -1,39 +0,0 @@
/* UART Example for Teensy USB Development Board
* http://www.pjrc.com/teensy/
* Copyright (c) 2009 PJRC.COM, LLC
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
void uart_init(uint32_t baud);
void uart_write(uint8_t data);
uint8_t uart_read(void);
void uart_transmit(const uint8_t *data, uint16_t length);
void uart_receive(uint8_t *data, uint16_t length);
bool uart_available(void);

28
platforms/avr/timer.c
View File

@@ -125,34 +125,6 @@ inline uint32_t timer_read32(void) {
return t;
}
/** \brief timer elapsed
*
* FIXME: needs doc
*/
inline uint16_t timer_elapsed(uint16_t last) {
uint32_t t;
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
t = timer_count;
}
return TIMER_DIFF_16((t & 0xFFFF), last);
}
/** \brief timer elapsed32
*
* FIXME: needs doc
*/
inline uint32_t timer_elapsed32(uint32_t last) {
uint32_t t;
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
t = timer_count;
}
return TIMER_DIFF_32(t, last);
}
// excecuted once per 1ms.(excess for just timer count?)
#ifndef __AVR_ATmega32A__
# define TIMER_INTERRUPT_VECTOR TIMER0_COMPA_vect

4
platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.c
View File

@@ -1,7 +1,7 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
ChibiOS - Copyright (C) 2023..2024 HorrorTroll
ChibiOS - Copyright (C) 2023..2024 Zhaqian
ChibiOS - Copyright (C) 2023..2025 HorrorTroll
ChibiOS - Copyright (C) 2023..2025 Zhaqian
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

28
platforms/chibios/boards/GENERIC_AT32_F415XX/board/board.h
View File

@@ -1,7 +1,7 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
ChibiOS - Copyright (C) 2023..2024 HorrorTroll
ChibiOS - Copyright (C) 2023..2024 Zhaqian
ChibiOS - Copyright (C) 2023..2025 HorrorTroll
ChibiOS - Copyright (C) 2023..2025 Zhaqian
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@@ -49,6 +49,14 @@
*/
#define AT32F415KB
/*
* GPIO settings, allow unused GPIO for smaller chip packages.
*/
#if defined(AT32F415KB) || defined(AT32F415KC)
#define AT32_HAS_GPIOC TRUE
#define AT32_HAS_GPIOF TRUE
#endif
/*
* IO pins assignments.
*/
@@ -142,21 +150,21 @@
* 6 - Open Drain output 2MHz.
* 7 - Open Drain output 50MHz.
* 8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT.
* 9 - Alternate Push Pull output 10MHz.
* A - Alternate Push Pull output 2MHz.
* B - Alternate Push Pull output 50MHz.
* 9 - Multiplexing Push Pull output 10MHz.
* A - Multiplexing Push Pull output 2MHz.
* B - Multiplexing Push Pull output 50MHz.
* C - Reserved.
* D - Alternate Open Drain output 10MHz.
* E - Alternate Open Drain output 2MHz.
* F - Alternate Open Drain output 50MHz.
* D - Multiplexing Open Drain output 10MHz.
* E - Multiplexing Open Drain output 2MHz.
* F - Multiplexing Open Drain output 50MHz.
* Please refer to the AT32 Reference Manual for details.
*/
/*
* Port A setup.
*/
#define VAL_GPIOACFGLR 0x88888B88 /* PA7...PA0 */
#define VAL_GPIOACFGHR 0x888888B8 /* PA15...PA8 */
#define VAL_GPIOACFGLR 0x88888888 /* PA7...PA0 */
#define VAL_GPIOACFGHR 0x88888888 /* PA15...PA8 */
#define VAL_GPIOAODT 0xFFFFFFFF
/*

4
platforms/chibios/boards/GENERIC_AT32_F415XX/configs/config.h
View File

@@ -1,5 +1,5 @@
// Copyright 2023-2024 HorrorTroll <https://github.com/HorrorTroll>
// Copyright 2023-2024 Zhaqian <https://github.com/zhaqian12>
// Copyright 2023-2025 HorrorTroll <https://github.com/HorrorTroll>
// Copyright 2023-2025 Zhaqian <https://github.com/zhaqian12>
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once

16
platforms/chibios/boards/GENERIC_AT32_F415XX/configs/mcuconf.h
View File

@@ -1,7 +1,7 @@
/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
ChibiOS - Copyright (C) 2023..2024 HorrorTroll
ChibiOS - Copyright (C) 2023..2024 Zhaqian
ChibiOS - Copyright (C) 2023..2025 HorrorTroll
ChibiOS - Copyright (C) 2023..2025 Zhaqian
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@@ -63,7 +63,7 @@
#define AT32_USBDIV AT32_USBDIV_DIV3
#define AT32_CLKOUT_SEL AT32_CLKOUT_SEL_NOCLOCK
#define AT32_CLKOUTDIV AT32_CLKOUTDIV_DIV1
#define AT32_ERTCSEL AT32_ERTCSEL_HEXTDIV
#define AT32_ERTCSEL AT32_ERTCSEL_NOCLOCK
#define AT32_PVM_ENABLE FALSE
#define AT32_PVMSEL AT32_PVMSEL_LEV1
@@ -136,10 +136,10 @@
#define AT32_I2C_USE_I2C1 FALSE
#define AT32_I2C_USE_I2C2 FALSE
#define AT32_I2C_BUSY_TIMEOUT 50
#define AT32_I2C_I2C1_IRQ_PRIORITY 5
#define AT32_I2C_I2C2_IRQ_PRIORITY 5
#define AT32_I2C_I2C1_DMA_PRIORITY 3
#define AT32_I2C_I2C2_DMA_PRIORITY 3
#define AT32_I2C_I2C1_IRQ_PRIORITY 5
#define AT32_I2C_I2C2_IRQ_PRIORITY 5
#define AT32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
@@ -151,8 +151,6 @@
#define AT32_ICU_USE_TMR4 FALSE
#define AT32_ICU_USE_TMR5 FALSE
#define AT32_ICU_USE_TMR9 FALSE
#define AT32_ICU_USE_TMR10 FALSE
#define AT32_ICU_USE_TMR11 FALSE
/*
* PWM driver system settings.
@@ -216,9 +214,13 @@
#define AT32_UART_USE_USART1 FALSE
#define AT32_UART_USE_USART2 FALSE
#define AT32_UART_USE_USART3 FALSE
#define AT32_UART_USE_UART4 FALSE
#define AT32_UART_USE_UART5 FALSE
#define AT32_UART_USART1_DMA_PRIORITY 0
#define AT32_UART_USART2_DMA_PRIORITY 0
#define AT32_UART_USART3_DMA_PRIORITY 0
#define AT32_UART_UART4_DMA_PRIORITY 0
#define AT32_UART_UART5_DMA_PRIORITY 0
#define AT32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*

2
platforms/chibios/boards/GENERIC_STM32_H723XG/configs/mcuconf.h
View File

@@ -182,6 +182,7 @@
#define STM32_IRQ_FDCAN1_PRIORITY 10
#define STM32_IRQ_FDCAN2_PRIORITY 10
#define STM32_IRQ_FDCAN3_PRIORITY 10
#define STM32_IRQ_MDMA_PRIORITY 9
@@ -235,6 +236,7 @@
*/
#define STM32_CAN_USE_FDCAN1 FALSE
#define STM32_CAN_USE_FDCAN2 FALSE
#define STM32_CAN_USE_FDCAN3 FALSE
/*
* DAC driver system settings.

23
platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h
View File

@@ -49,6 +49,19 @@
#define CH_CFG_SMP_MODE FALSE
#endif
/**
* @brief Kernel hardening level.
* @details This option is the level of functional-safety checks enabled
* in the kerkel. The meaning is:
* - 0: No checks, maximum performance.
* - 1: Reasonable checks.
* - 2: All checks.
* .
*/
#if !defined(CH_CFG_HARDENING_LEVEL)
#define CH_CFG_HARDENING_LEVEL 0
#endif
/** @} */
/*===========================================================================*/
@@ -360,6 +373,16 @@
#define CH_CFG_USE_MAILBOXES TRUE
#endif
/**
* @brief Memory checks APIs.
* @details If enabled then the memory checks APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MEMCHECKS)
#define CH_CFG_USE_MEMCHECKS TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included

23
platforms/chibios/boards/common/configs/chconf.h
View File

@@ -49,6 +49,19 @@
#define CH_CFG_SMP_MODE FALSE
#endif
/**
* @brief Kernel hardening level.
* @details This option is the level of functional-safety checks enabled
* in the kerkel. The meaning is:
* - 0: No checks, maximum performance.
* - 1: Reasonable checks.
* - 2: All checks.
* .
*/
#if !defined(CH_CFG_HARDENING_LEVEL)
#define CH_CFG_HARDENING_LEVEL 0
#endif
/** @} */
/*===========================================================================*/
@@ -360,6 +373,16 @@
#define CH_CFG_USE_MAILBOXES FALSE
#endif
/**
* @brief Memory checks APIs.
* @details If enabled then the memory checks APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MEMCHECKS)
#define CH_CFG_USE_MEMCHECKS TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included

4
platforms/chibios/chibios_config.h
View File

@@ -149,8 +149,8 @@
# if defined(AT32F415)
# define USE_GPIOV1
# define USE_I2CV1
# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_AT32_ALTERNATE_OPENDRAIN
# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_AT32_ALTERNATE_PUSHPULL
# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_AT32_MUX_OPENDRAIN
# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_AT32_MUX_PUSHPULL
# define AUDIO_PWM_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# endif
#endif

18
platforms/chibios/drivers/audio_pwm_hardware.c
View File

@@ -41,18 +41,19 @@ static float channel_1_frequency = 0.0f;
void channel_1_set_frequency(float freq) {
channel_1_frequency = freq;
pwmcnt_t period;
pwmcnt_t width;
if (freq <= 0.0) {
// a pause/rest has freq=0
return;
period = 2;
width = 0;
} else {
period = (pwmCFG.frequency / freq);
width = (pwmcnt_t)(((period) * (pwmcnt_t)((100 - note_timbre) * 100)) / (pwmcnt_t)(10000));
}
pwmcnt_t period = (pwmCFG.frequency / freq);
chSysLockFromISR();
pwmChangePeriodI(&AUDIO_PWM_DRIVER, period);
pwmEnableChannelI(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1,
// adjust the duty-cycle so that the output is for 'note_timbre' duration HIGH
PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100));
pwmEnableChannelI(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, width);
chSysUnlockFromISR();
}
@@ -67,6 +68,9 @@ void channel_1_start(void) {
void channel_1_stop(void) {
pwmStop(&AUDIO_PWM_DRIVER);
pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG);
pwmEnableChannel(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1, 0);
pwmStop(&AUDIO_PWM_DRIVER);
}
static virtual_timer_t audio_vt;

4
platforms/chibios/drivers/backlight_pwm.c
View File

@@ -28,9 +28,9 @@
// Support for pins which are on TIM1_CH1N
#ifdef BACKLIGHT_PWM_COMPLEMENTARY_OUTPUT
# if BACKLIGHT_ON_STATE == 1
# define PWM_OUTPUT_MODE PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW;
# else
# define PWM_OUTPUT_MODE PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH;
# else
# define PWM_OUTPUT_MODE PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW;
# endif
#else
# if BACKLIGHT_ON_STATE == 1

45
platforms/chibios/drivers/eeprom/eeprom_stm32_L0_L1.c
View File

@@ -25,6 +25,7 @@
#define EEPROM_ADDR(offset) (EEPROM_BASE_ADDR + (offset))
#define EEPROM_PTR(offset) ((__IO uint8_t *)EEPROM_ADDR(offset))
#define EEPROM_BYTE(location, offset) (*(EEPROM_PTR(((uint32_t)location) + ((uint32_t)offset))))
#define EEPROM_WORD(location) (*(__IO uint32_t *)EEPROM_PTR(location))
#define BUFFER_BYTE(buffer, offset) (*(((uint8_t *)buffer) + offset))
@@ -62,12 +63,16 @@ void eeprom_driver_erase(void) {
STM32_L0_L1_EEPROM_Unlock();
for (size_t offset = 0; offset < STM32_ONBOARD_EEPROM_SIZE; offset += sizeof(uint32_t)) {
#ifdef QMK_MCU_SERIES_STM32L0XX
FLASH->PECR |= FLASH_PECR_ERASE | FLASH_PECR_DATA;
#endif
*(__IO uint32_t *)EEPROM_ADDR(offset) = (uint32_t)0;
EEPROM_WORD(offset) = (uint32_t)0;
STM32_L0_L1_EEPROM_WaitNotBusy();
#ifdef QMK_MCU_SERIES_STM32L0XX
FLASH->PECR &= ~(FLASH_PECR_ERASE | FLASH_PECR_DATA);
#endif
}
STM32_L0_L1_EEPROM_Lock();
@@ -86,17 +91,39 @@ void eeprom_read_block(void *buf, const void *addr, size_t len) {
}
void eeprom_write_block(const void *buf, void *addr, size_t len) {
STM32_L0_L1_EEPROM_Unlock();
// use word-aligned write to overcome issues with writing null bytes
uint32_t start_addr = (uint32_t)addr;
if (start_addr >= (STM32_ONBOARD_EEPROM_SIZE)) {
return;
}
uint32_t max_len = (STM32_ONBOARD_EEPROM_SIZE)-start_addr;
if (len > max_len) {
len = max_len;
}
uint32_t end_addr = start_addr + len;
for (size_t offset = 0; offset < len; ++offset) {
// Drop out if we've hit the limit of the EEPROM
if ((((uint32_t)addr) + offset) >= STM32_ONBOARD_EEPROM_SIZE) {
break;
uint32_t aligned_start = start_addr & ~0x3;
uint32_t aligned_end = (end_addr + 3) & ~0x3;
STM32_L0_L1_EEPROM_Unlock();
for (uint32_t word_addr = aligned_start; word_addr < aligned_end; word_addr += 4) {
uint32_t existing_word = EEPROM_WORD(word_addr);
uint32_t new_word = existing_word;
// Update the relevant bytes in the word
for (int i = 0; i < 4; i++) {
uint32_t byte_addr = word_addr + i;
if (byte_addr >= start_addr && byte_addr < end_addr) {
uint8_t new_byte = BUFFER_BYTE(buf, byte_addr - start_addr);
new_word = (new_word & ~(0xFFU << (i * 8))) | ((uint32_t)new_byte << (i * 8));
}
}
STM32_L0_L1_EEPROM_WaitNotBusy();
EEPROM_BYTE(addr, offset) = BUFFER_BYTE(buf, offset);
// Only write if the word has changed
if (new_word != existing_word) {
STM32_L0_L1_EEPROM_WaitNotBusy();
EEPROM_WORD(word_addr) = new_word;
}
}
STM32_L0_L1_EEPROM_Lock();
}

43
platforms/chibios/drivers/i2c_master.c
View File

@@ -29,17 +29,37 @@
#include "i2c_master.h"
#include "gpio.h"
#include "chibios_config.h"
#include <string.h>
#include <ch.h>
#include <hal.h>
#ifndef I2C_DRIVER
# define I2C_DRIVER I2CD1
#endif
#ifndef I2C1_SCL_PIN
# define I2C1_SCL_PIN B6
#endif
#ifndef I2C1_SCL_PAL_MODE
# ifdef USE_GPIOV1
# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# else
# define I2C1_SCL_PAL_MODE 4
# endif
#endif
#ifndef I2C1_SDA_PIN
# define I2C1_SDA_PIN B7
#endif
#ifndef I2C1_SDA_PAL_MODE
# ifdef USE_GPIOV1
# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# else
# define I2C1_SDA_PAL_MODE 4
# endif
#endif
#ifdef USE_I2CV1
# ifndef I2C1_OPMODE
# define I2C1_OPMODE OPMODE_I2C
@@ -70,27 +90,6 @@
# endif
#endif
#ifndef I2C_DRIVER
# define I2C_DRIVER I2CD1
#endif
#ifdef USE_GPIOV1
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
#else
// The default PAL alternate modes are used to signal that the pins are used for I2C
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE 4
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE 4
# endif
#endif
static const I2CConfig i2cconfig = {
#if defined(USE_I2CV1_CONTRIB)
I2C1_CLOCK_SPEED,

49
platforms/chibios/drivers/i2c_master.h
View File

@@ -1,49 +0,0 @@
/* Copyright 2018 Jack Humbert
* Copyright 2018 Yiancar
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* This library follows the convention of the AVR i2c_master library.
* As a result addresses are expected to be already shifted (addr << 1).
* I2CD1 is the default driver which corresponds to pins B6 and B7. This
* can be changed.
* Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
* STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file.
*/
#pragma once
#include <stdint.h>
// ### DEPRECATED - DO NOT USE ###
#define i2c_writeReg(devaddr, regaddr, data, length, timeout) i2c_write_register(devaddr, regaddr, data, length, timeout)
#define i2c_writeReg16(devaddr, regaddr, data, length, timeout) i2c_write_register16(devaddr, regaddr, data, length, timeout)
#define i2c_readReg(devaddr, regaddr, data, length, timeout) i2c_read_register(devaddr, regaddr, data, length, timeout)
#define i2c_readReg16(devaddr, regaddr, data, length, timeout) i2c_read_register16(devaddr, regaddr, data, length, timeout)
// ###############################
typedef int16_t i2c_status_t;
#define I2C_STATUS_SUCCESS (0)
#define I2C_STATUS_ERROR (-1)
#define I2C_STATUS_TIMEOUT (-2)
void i2c_init(void);
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_write_register(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_write_register16(uint8_t devaddr, uint16_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_read_register(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_read_register16(uint8_t devaddr, uint16_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_ping_address(uint8_t address, uint16_t timeout);

43
platforms/chibios/drivers/spi_master.c
View File

@@ -15,8 +15,49 @@
*/
#include "spi_master.h"
#include "chibios_config.h"
#include <ch.h>
#include <hal.h>
#include "timer.h"
#ifndef SPI_DRIVER
# define SPI_DRIVER SPID2
#endif
#ifndef SPI_SCK_PIN
# define SPI_SCK_PIN B13
#endif
#ifndef SPI_SCK_PAL_MODE
# ifdef USE_GPIOV1
# define SPI_SCK_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_SCK_PAL_MODE 5
# endif
#endif
#ifndef SPI_MOSI_PIN
# define SPI_MOSI_PIN B15
#endif
#ifndef SPI_MOSI_PAL_MODE
# ifdef USE_GPIOV1
# define SPI_MOSI_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_MOSI_PAL_MODE 5
# endif
#endif
#ifndef SPI_MISO_PIN
# define SPI_MISO_PIN B14
#endif
#ifndef SPI_MISO_PAL_MODE
# ifdef USE_GPIOV1
# define SPI_MISO_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_MISO_PAL_MODE 5
# endif
#endif
static bool spiStarted = false;
#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE

102
platforms/chibios/drivers/spi_master.h
View File

@@ -1,102 +0,0 @@
/* Copyright 2020 Nick Brassel (tzarc)
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#pragma once
#include <ch.h>
#include <hal.h>
#include <stdbool.h>
#include "gpio.h"
#include "chibios_config.h"
#ifndef SPI_DRIVER
# define SPI_DRIVER SPID2
#endif
#ifndef SPI_SCK_PIN
# define SPI_SCK_PIN B13
#endif
#ifndef SPI_SCK_PAL_MODE
# if defined(USE_GPIOV1)
# define SPI_SCK_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_SCK_PAL_MODE 5
# endif
#endif
#ifndef SPI_MOSI_PIN
# define SPI_MOSI_PIN B15
#endif
#ifndef SPI_MOSI_PAL_MODE
# if defined(USE_GPIOV1)
# define SPI_MOSI_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_MOSI_PAL_MODE 5
# endif
#endif
#ifndef SPI_MISO_PIN
# define SPI_MISO_PIN B14
#endif
#ifndef SPI_MISO_PAL_MODE
# if defined(USE_GPIOV1)
# define SPI_MISO_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define SPI_MISO_PAL_MODE 5
# endif
#endif
typedef int16_t spi_status_t;
#define SPI_STATUS_SUCCESS (0)
#define SPI_STATUS_ERROR (-1)
#define SPI_STATUS_TIMEOUT (-2)
#define SPI_TIMEOUT_IMMEDIATE (0)
#define SPI_TIMEOUT_INFINITE (0xFFFF)
#ifdef __cplusplus
extern "C" {
#endif
typedef struct spi_start_config_t {
pin_t slave_pin;
bool lsb_first;
uint8_t mode;
uint16_t divisor;
bool cs_active_low;
} spi_start_config_t;
void spi_init(void);
bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor);
bool spi_start_extended(spi_start_config_t *start_config);
spi_status_t spi_write(uint8_t data);
spi_status_t spi_read(void);
spi_status_t spi_transmit(const uint8_t *data, uint16_t length);
spi_status_t spi_receive(uint8_t *data, uint16_t length);
void spi_stop(void);
#ifdef __cplusplus
}
#endif

200
platforms/chibios/drivers/uart.h
View File

@@ -1,200 +0,0 @@
// Copyright 2024 Stefan Kerkmann
// Copyright 2021 QMK
// Copyright 2024 Stefan Kerkmann
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include <hal.h>
#include "gpio.h"
#include "chibios_config.h"
// ======== DEPRECATED DEFINES - DO NOT USE ========
#ifdef SERIAL_DRIVER
# define UART_DRIVER SERIAL_DRIVER
#endif
#ifdef SD1_TX_PIN
# define UART_TX_PIN SD1_TX_PIN
#endif
#ifdef SD1_RX_PIN
# define UART_RX_PIN SD1_RX_PIN
#endif
#ifdef SD1_CTS_PIN
# define UART_CTS_PIN SD1_CTS_PIN
#endif
#ifdef SD1_RTS_PIN
# define UART_RTS_PIN SD1_RTS_PIN
#endif
#ifdef SD1_TX_PAL_MODE
# define UART_TX_PAL_MODE SD1_TX_PAL_MODE
#endif
#ifdef SD1_RX_PAL_MODE
# define UART_RX_PAL_MODE SD1_RX_PAL_MODE
#endif
#ifdef SD1_CTS_PAL_MODE
# define UART_RTS_PAL_MODE SD1_CTS_PAL_MODE
#endif
#ifdef SD1_RTS_PAL_MODE
# define UART_TX_PAL_MODE SD1_RTS_PAL_MODE
#endif
#ifdef SD1_CR1
# define UART_CR1 SD1_CR1
#endif
#ifdef SD1_CR2
# define UART_CR2 SD1_CR2
#endif
#ifdef SD1_CR3
# define UART_CR3 SD1_CR3
#endif
#ifdef SD1_WRDLEN
# define UART_WRDLEN SD1_WRDLEN
#endif
#ifdef SD1_STPBIT
# define UART_STPBIT SD1_STPBIT
#endif
#ifdef SD1_PARITY
# define UART_PARITY SD1_PARITY
#endif
#ifdef SD1_ATFLCT
# define UART_ATFLCT SD1_ATFLCT
#endif
// ========
#ifndef UART_DRIVER
# if (HAL_USE_SERIAL == TRUE)
# define UART_DRIVER SD1
# elif (HAL_USE_SIO == TRUE)
# define UART_DRIVER SIOD1
# endif
#endif
#ifndef UART_TX_PIN
# define UART_TX_PIN A9
#endif
#ifndef UART_RX_PIN
# define UART_RX_PIN A10
#endif
#ifndef UART_CTS_PIN
# define UART_CTS_PIN A11
#endif
#ifndef UART_RTS_PIN
# define UART_RTS_PIN A12
#endif
#ifdef USE_GPIOV1
# ifndef UART_TX_PAL_MODE
# define UART_TX_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# endif
# ifndef UART_RX_PAL_MODE
# define UART_RX_PAL_MODE PAL_MODE_INPUT
# endif
# ifndef UART_CTS_PAL_MODE
# define UART_CTS_PAL_MODE PAL_MODE_INPUT
# endif
# ifndef UART_RTS_PAL_MODE
# define UART_RTS_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# endif
#else
# ifndef UART_TX_PAL_MODE
# define UART_TX_PAL_MODE 7
# endif
# ifndef UART_RX_PAL_MODE
# define UART_RX_PAL_MODE 7
# endif
# ifndef UART_CTS_PAL_MODE
# define UART_CTS_PAL_MODE 7
# endif
# ifndef UART_RTS_PAL_MODE
# define UART_RTS_PAL_MODE 7
# endif
#endif
#ifndef UART_CR1
# define UART_CR1 0
#endif
#ifndef UART_CR2
# define UART_CR2 0
#endif
#ifndef UART_CR3
# define UART_CR3 0
#endif
#ifndef UART_WRDLEN
# define UART_WRDLEN 3
#endif
#ifndef UART_STPBIT
# define UART_STPBIT 0
#endif
#ifndef UART_PARITY
# define UART_PARITY 0
#endif
#ifndef UART_ATFLCT
# define UART_ATFLCT 0
#endif
/**
* @brief Initialize the UART driver. This function must be called only once,
* before any of the below functions can be called.
*
* @param baud The baud rate to transmit and receive at. This may depend on the
* device you are communicating with. Common values are 1200, 2400, 4800, 9600,
* 19200, 38400, 57600, and 115200.
*/
void uart_init(uint32_t baud);
/**
* @brief Transmit a single byte.
*
* @param data The byte to transmit.
*/
void uart_write(uint8_t data);
/**
* @brief Receive a single byte.
*
* @return uint8_t The byte read from the receive buffer. This function will
* block if the buffer is empty (ie. no data to read).
*/
uint8_t uart_read(void);
/**
* @brief Transmit multiple bytes.
*
* @param data A pointer to the data to write from.
* @param length The number of bytes to write. Take care not to overrun the
* length of `data`.
*/
void uart_transmit(const uint8_t *data, uint16_t length);
/**
* @brief Receive multiple bytes.
*
* @param data A pointer to the buffer to read into.
* @param length The number of bytes to read. Take care not to overrun the
* length of `data`.
*/
void uart_receive(uint8_t *data, uint16_t length);
/**
* @brief Return whether the receive buffer contains data. Call this function
* to determine if `uart_read()` will return data immediately.
*
* @return true If there is data available to read.
* @return false If there is no data available to read.
*/
bool uart_available(void);

83
platforms/chibios/drivers/uart_serial.c
View File

@@ -3,6 +3,89 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "uart.h"
#include "gpio.h"
#include "chibios_config.h"
#include <hal.h>
#ifndef UART_DRIVER
# define UART_DRIVER SD1
#endif
#ifndef UART_TX_PIN
# define UART_TX_PIN A9
#endif
#ifndef UART_TX_PAL_MODE
# ifdef USE_GPIOV1
# define UART_TX_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define UART_TX_PAL_MODE 7
# endif
#endif
#ifndef UART_RX_PIN
# define UART_RX_PIN A10
#endif
#ifndef UART_RX_PAL_MODE
# ifdef USE_GPIOV1
# define UART_RX_PAL_MODE PAL_MODE_INPUT
# else
# define UART_RX_PAL_MODE 7
# endif
#endif
#ifndef UART_CTS_PIN
# define UART_CTS_PIN A11
#endif
#ifndef UART_CTS_PAL_MODE
# ifdef USE_GPIOV1
# define UART_CTS_PAL_MODE PAL_MODE_INPUT
# else
# define UART_CTS_PAL_MODE 7
# endif
#endif
#ifndef UART_RTS_PIN
# define UART_RTS_PIN A12
#endif
#ifndef UART_RTS_PAL_MODE
# ifdef USE_GPIOV1
# define UART_RTS_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define UART_RTS_PAL_MODE 7
# endif
#endif
#ifndef UART_CR1
# define UART_CR1 0
#endif
#ifndef UART_CR2
# define UART_CR2 0
#endif
#ifndef UART_CR3
# define UART_CR3 0
#endif
#ifndef UART_WRDLEN
# define UART_WRDLEN 3
#endif
#ifndef UART_STPBIT
# define UART_STPBIT 0
#endif
#ifndef UART_PARITY
# define UART_PARITY 0
#endif
#ifndef UART_ATFLCT
# define UART_ATFLCT 0
#endif
#if defined(MCU_KINETIS)
static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE};

67
platforms/chibios/drivers/uart_sio.c
View File

@@ -3,6 +3,73 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "uart.h"
#include "gpio.h"
#include "chibios_config.h"
#include <hal.h>
#ifndef UART_DRIVER
# define UART_DRIVER SIOD1
#endif
#ifndef UART_TX_PIN
# define UART_TX_PIN A9
#endif
#ifndef UART_TX_PAL_MODE
# ifdef USE_GPIOV1
# define UART_TX_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define UART_TX_PAL_MODE 7
# endif
#endif
#ifndef UART_RX_PIN
# define UART_RX_PIN A10
#endif
#ifndef UART_RX_PAL_MODE
# ifdef USE_GPIOV1
# define UART_RX_PAL_MODE PAL_MODE_INPUT
# else
# define UART_RX_PAL_MODE 7
# endif
#endif
#ifndef UART_CTS_PIN
# define UART_CTS_PIN A11
#endif
#ifndef UART_CTS_PAL_MODE
# ifdef USE_GPIOV1
# define UART_CTS_PAL_MODE PAL_MODE_INPUT
# else
# define UART_CTS_PAL_MODE 7
# endif
#endif
#ifndef UART_RTS_PIN
# define UART_RTS_PIN A12
#endif
#ifndef UART_RTS_PAL_MODE
# ifdef USE_GPIOV1
# define UART_RTS_PAL_MODE PAL_MODE_ALTERNATE_PUSHPULL
# else
# define UART_RTS_PAL_MODE 7
# endif
#endif
#ifndef UART_CR1
# define UART_CR1 0
#endif
#ifndef UART_CR2
# define UART_CR2 0
#endif
#ifndef UART_CR3
# define UART_CR3 0
#endif
#if defined(MCU_RP)
// 38400 baud, 8 data bits, 1 stop bit, no parity, no flow control

12
platforms/chibios/timer.c
View File

@@ -99,7 +99,7 @@ uint16_t timer_read(void) {
}
uint32_t timer_read32(void) {
chSysLock();
syssts_t sts = chSysGetStatusAndLockX();
uint32_t ticks = get_system_time_ticks() - ticks_offset;
if (ticks < last_ticks) {
// The 32-bit tick counter overflowed and wrapped around. We cannot just extend the counter to 64 bits here,
@@ -114,15 +114,7 @@ uint32_t timer_read32(void) {
}
last_ticks = ticks;
uint32_t ms_offset_copy = ms_offset; // read while still holding the lock to ensure a consistent value
chSysUnlock();
chSysRestoreStatusX(sts);
return (uint32_t)TIME_I2MS(ticks) + ms_offset_copy;
}
uint16_t timer_elapsed(uint16_t last) {
return TIMER_DIFF_16(timer_read(), last);
}
uint32_t timer_elapsed32(uint32_t last) {
return TIMER_DIFF_32(timer_read32(), last);
}

8
platforms/test/timer.c
View File

@@ -60,14 +60,6 @@ uint32_t timer_read32(void) {
return current_time;
}
uint16_t timer_elapsed(uint16_t last) {
return TIMER_DIFF_16(timer_read(), last);
}
uint32_t timer_elapsed32(uint32_t last) {
return TIMER_DIFF_32(timer_read32(), last);
}
void set_time(uint32_t t) {
current_time = t;
access_counter = 0;

8
platforms/timer.c
View File

@@ -6,3 +6,11 @@
// Generate out-of-line copies for inline functions defined in timer.h.
extern inline fast_timer_t timer_read_fast(void);
extern inline fast_timer_t timer_elapsed_fast(fast_timer_t last);
uint16_t timer_elapsed(uint16_t last) {
return TIMER_DIFF_16(timer_read(), last);
}
uint32_t timer_elapsed32(uint32_t last) {
return TIMER_DIFF_32(timer_read32(), last);
}

7
platforms/timer.h
View File

@@ -24,10 +24,9 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#include <stdint.h>
#define TIMER_DIFF(a, b, max) ((max == UINT8_MAX) ? ((uint8_t)((a) - (b))) : ((max == UINT16_MAX) ? ((uint16_t)((a) - (b))) : ((max == UINT32_MAX) ? ((uint32_t)((a) - (b))) : ((a) >= (b) ? (a) - (b) : (max) + 1 - (b) + (a)))))
#define TIMER_DIFF_8(a, b) TIMER_DIFF(a, b, UINT8_MAX)
#define TIMER_DIFF_16(a, b) TIMER_DIFF(a, b, UINT16_MAX)
#define TIMER_DIFF_32(a, b) TIMER_DIFF(a, b, UINT32_MAX)
#define TIMER_DIFF_8(a, b) (uint8_t)((a) - (b))
#define TIMER_DIFF_16(a, b) (uint16_t)((a) - (b))
#define TIMER_DIFF_32(a, b) (uint32_t)((a) - (b))
#define TIMER_DIFF_RAW(a, b) TIMER_DIFF_8(a, b)
#ifdef __cplusplus