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This commit is contained in:
Thomas Haukland
2023-01-18 21:26:09 +01:00
commit a1f432f001
13 changed files with 95790 additions and 0 deletions
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.gitignore
+42
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# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*.kicad_prl
*.sch-bak
*~
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
_autosave*
*.drl
gerber.*
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
flex/gerber
gerber
gerber/*
flex/flex-backups
flex/flex-backups/*
# Project specific files
adapter/adapter-backups
**/sym-lib-table
**/*-backups
**/fp-lib-table
**/*.kicad_sym
cheapino-job.gbrjob
+119
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{
"Header": {
"GenerationSoftware": {
"Vendor": "KiCad",
"Application": "Pcbnew",
"Version": "(6.0.7-1)-1"
},
"CreationDate": "2023-01-08T21:51:56+01:00"
},
"GeneralSpecs": {
"ProjectId": {
"Name": "cheapino",
"GUID": "63686561-7069-46e6-9f2e-6b696361645f",
"Revision": "rev?"
},
"Size": {
"X": 131.2148,
"Y": 94.9436
},
"LayerNumber": 2,
"BoardThickness": 1.6,
"Finish": "None"
},
"DesignRules": [
{
"Layers": "Outer",
"PadToPad": 0.2,
"PadToTrack": 0.2,
"TrackToTrack": 0.2
}
],
"FilesAttributes": [
{
"Path": "cheapino-F_Cu.gbr",
"FileFunction": "Copper,L1,Top",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-B_Cu.gbr",
"FileFunction": "Copper,L2,Bot",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-F_Paste.gbr",
"FileFunction": "SolderPaste,Top",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-B_Paste.gbr",
"FileFunction": "SolderPaste,Bot",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-F_Silkscreen.gbr",
"FileFunction": "Legend,Top",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-B_Silkscreen.gbr",
"FileFunction": "Legend,Bot",
"FilePolarity": "Positive"
},
{
"Path": "cheapino-F_Mask.gbr",
"FileFunction": "SolderMask,Top",
"FilePolarity": "Negative"
},
{
"Path": "cheapino-B_Mask.gbr",
"FileFunction": "SolderMask,Bot",
"FilePolarity": "Negative"
},
{
"Path": "cheapino-Edge_Cuts.gbr",
"FileFunction": "Profile",
"FilePolarity": "Positive"
}
],
"MaterialStackup": [
{
"Type": "Legend",
"Name": "Top Silk Screen"
},
{
"Type": "SolderPaste",
"Name": "Top Solder Paste"
},
{
"Type": "SolderMask",
"Name": "Top Solder Mask"
},
{
"Type": "Copper",
"Name": "F.Cu"
},
{
"Type": "Dielectric",
"Material": "FR4",
"Name": "F.Cu/B.Cu",
"Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
},
{
"Type": "Copper",
"Name": "B.Cu"
},
{
"Type": "SolderMask",
"Name": "Bottom Solder Mask"
},
{
"Type": "SolderPaste",
"Name": "Bottom Solder Paste"
},
{
"Type": "Legend",
"Name": "Bottom Silk Screen"
}
]
}
cheapino.kicad_pcb
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cheapino.kicad_pro
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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
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[
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[
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]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "cheapino.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"9203b006-47ac-4f34-8cc4-2b709e3df56f",
""
]
],
"text_variables": {}
}
cheapino.kicad_sch
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project_libraries/project-3dmodels/RJ45-8Z4.stp
+11493
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project_libraries/project-3dmodels/SW_Cherry_MX_PCB.stp
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project_libraries/project-3dmodels/SW_Cherry_MX_PCB.wrl
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project_libraries/project-3dmodels/ec11.stp
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project_libraries/project-3dmodels/seeduino.stp
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project_libraries/project-footprints/MCU_Waveshare.pretty/MCU_RP2040_Zero_34.kicad_mod
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(footprint "MCU_RP2040_Zero_34" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 62AEED17)
(attr through_hole)
(fp_text reference "REF**" (at 1.27 0 unlocked) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 4c9fdea7-ba0c-45cc-8f66-240980c37d5c)
)
(fp_text value "MCU_RP2040_Zero_34" (at 6.35 2.54 -90 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c58960d9-4cac-4036-ad2e-1aef26946dae)
)
(fp_text user "${REFERENCE}" (at 1.27 2.5 unlocked) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 5b96c1ad-46ba-4366-8241-fbc1cd0e9bbd)
)
(fp_line (start 12.7 -9.21) (end 12.7 14.29) (layer "F.CrtYd") (width 0.05) (tstamp 18d8dbd4-b1d9-41dc-8f01-e21b1af2896e))
(fp_line (start -7.62 -9.21) (end 12.7 -9.21) (layer "F.CrtYd") (width 0.05) (tstamp 61adef0a-230d-4fd2-b911-48125578aa7b))
(fp_line (start -7.62 14.29) (end -7.62 -9.21) (layer "F.CrtYd") (width 0.05) (tstamp 629a1a23-6cc3-4805-8eb4-b524e98c50fe))
(fp_line (start 12.7 14.29) (end -7.62 14.29) (layer "F.CrtYd") (width 0.05) (tstamp 85d479b6-6e26-49df-9eea-5ccf08e3daeb))
(fp_rect (start -2.54 5.08) (end 0 7.62) (layer "User.1") (width 0.12) (fill none) (tstamp 68498924-6ef0-4f5c-a71e-e6d9035d0767))
(pad "0" thru_hole circle (at 10.16 -7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 19bd73b2-3f37-4fb6-9cb5-b348162a5c0b))
(pad "1" thru_hole circle (at 10.16 -5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 85d1bf79-a107-4a1b-9094-9ce33df88ae1))
(pad "2" thru_hole circle (at 10.16 -2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp fdba875d-d09f-4236-a904-878dd4d98248))
(pad "3" thru_hole circle (at 10.16 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp dd01b8aa-7790-45d9-80e0-c2516d6290d6))
(pad "4" thru_hole circle (at 10.16 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp e911602e-5d97-49ac-8fe5-c4072742ad92))
(pad "5" thru_hole circle (at 10.16 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 0826c41f-33a6-40a2-8f22-38fd6c403111))
(pad "6" thru_hole circle (at 10.16 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 5fbf8bba-9904-40b2-b359-f98de593551b))
(pad "7" thru_hole circle (at 10.16 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp c1974347-361d-428c-9439-f2a3afcaf46f))
(pad "8" thru_hole circle (at 10.16 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 6aea4f6b-188a-48b3-ba49-1c96321ff077))
(pad "9" thru_hole circle (at 7.62 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 56a7b1e7-3ffe-478b-a62f-038173508177))
(pad "10" thru_hole circle (at 5.08 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp f6fa0c83-6ef0-471a-9689-7c202c298e5a))
(pad "11" thru_hole circle (at 2.54 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp ba774a53-0095-40d0-b6de-4294543afd99))
(pad "12" thru_hole circle (at 0 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 3924b65d-2678-4e87-bdf0-fbf4ee8dc2ba))
(pad "13" thru_hole circle (at -2.54 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 6da4f6ca-2e8a-42e1-8741-dc4c29721a9e))
(pad "14" thru_hole circle (at -5.08 12.7) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp c1f6ace4-ad78-4e30-b116-aba17fda5328))
(pad "15" thru_hole circle (at -5.08 10.16) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp ee2353ae-b8da-46a6-8c87-0d6f63d7d3b5))
(pad "26" thru_hole circle (at -5.08 7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 5435b044-3d2d-4dc4-98e6-42278805c1a1))
(pad "27" thru_hole circle (at -5.08 5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 72759e1d-9d77-4d9a-8d71-8418dc66d178))
(pad "28" thru_hole circle (at -5.08 2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp 4ecd705a-2084-4ca5-8237-fca5b42e42e8))
(pad "29" thru_hole circle (at -5.08 0) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp f2184d4d-ec4f-448c-84ba-6b280b7dc5ce))
(pad "30" thru_hole circle (at -5.08 -2.54) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp f307e656-6811-4201-ab7e-b8770908fbb1))
(pad "31" thru_hole circle (at -5.08 -5.08) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp ce5dba25-78a3-452d-a7d3-867f7b366e00))
(pad "32" thru_hole circle (at -5.08 -7.62) (size 1.524 1.524) (drill 0.762) (layers *.Cu *.Mask) (tstamp ae56f6df-14ef-4eb9-875c-0de9e1497d65))
)
project_libraries/project-footprints/keyboard_parts.pretty/D_SOD123_axial.kicad_mod
+26
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(module D_SOD123_axial (layer F.Cu) (tedit 561B6A12)
(attr smd)
(fp_text reference D** (at 0 1.925) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(fp_text value D (at 0 -1.925) (layer F.SilkS) hide
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(fp_line (start -2.275 -1.2) (end -2.275 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -2.45 -1.2) (end -2.45 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -2.625 -1.2) (end -2.625 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -3.025 1.2) (end -3.025 -1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -2.8 -1.2) (end -2.8 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -2.925 -1.2) (end -2.925 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start -3 -1.2) (end 2.8 -1.2) (layer F.SilkS) (width 0.2))
(fp_line (start 2.8 -1.2) (end 2.8 1.2) (layer F.SilkS) (width 0.2))
(fp_line (start 2.8 1.2) (end -3 1.2) (layer F.SilkS) (width 0.2))
(pad 2 smd rect (at 1.575 0) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -1.575 0) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask))
(pad 1 thru_hole rect (at -3.9 0) (size 1.6 1.6) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
(pad 2 thru_hole circle (at 3.9 0) (size 1.6 1.6) (drill 0.7) (layers *.Cu *.Mask F.SilkS))
(pad 1 smd rect (at -2.7 0) (size 2.5 0.5) (layers F.Cu)
(solder_mask_margin -999))
(pad 2 smd rect (at 2.7 0) (size 2.5 0.5) (layers F.Cu)
(solder_mask_margin -999))
)
project_libraries/project-footprints/mx.pretty/SW_MX_reversible_minimal.kicad_mod
+55
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(module SW_MX_reversible_minimal (layer F.Cu) (tedit 5DD4F90D)
(descr "MX-style keyswitch, reversible, without pcb-mount holes")
(tags MX,cherry,gateron,kailh)
(fp_text reference REF** (at 0 -3) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SW_MX_reversible_minimal (at 0 8.255) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -7 -6) (end -7 -7) (layer F.SilkS) (width 0.15))
(fp_line (start -7 -7) (end -6 -7) (layer F.SilkS) (width 0.15))
(fp_line (start -6 7) (end -7 7) (layer F.SilkS) (width 0.15))
(fp_line (start -7 7) (end -7 6) (layer B.SilkS) (width 0.15))
(fp_line (start 7 6) (end 7 7) (layer F.SilkS) (width 0.15))
(fp_line (start 7 7) (end 6 7) (layer F.SilkS) (width 0.15))
(fp_line (start 6 -7) (end 7 -7) (layer B.SilkS) (width 0.15))
(fp_line (start 7 -7) (end 7 -6) (layer F.SilkS) (width 0.15))
(fp_line (start -6.9 6.9) (end 6.9 6.9) (layer Eco2.User) (width 0.15))
(fp_line (start 6.9 -6.9) (end -6.9 -6.9) (layer Eco2.User) (width 0.15))
(fp_line (start 6.9 -6.9) (end 6.9 6.9) (layer Eco2.User) (width 0.15))
(fp_line (start -6.9 6.9) (end -6.9 -6.9) (layer Eco2.User) (width 0.15))
(fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer B.Fab) (width 0.15))
(fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer B.Fab) (width 0.15))
(fp_line (start 7.5 7.5) (end -7.5 7.5) (layer F.Fab) (width 0.15))
(fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer B.Fab) (width 0.15))
(fp_line (start -7 -6) (end -7 -7) (layer B.SilkS) (width 0.15))
(fp_line (start -7 -7) (end -6 -7) (layer B.SilkS) (width 0.15))
(fp_line (start 7 -7) (end 7 -6) (layer B.SilkS) (width 0.15))
(fp_line (start 6 -7) (end 7 -7) (layer F.SilkS) (width 0.15))
(fp_line (start 7 6) (end 7 7) (layer B.SilkS) (width 0.15))
(fp_line (start 7 7) (end 6 7) (layer B.SilkS) (width 0.15))
(fp_line (start -6 7) (end -7 7) (layer B.SilkS) (width 0.15))
(fp_line (start -7 7) (end -7 6) (layer F.SilkS) (width 0.15))
(fp_line (start -7.5 -7.5) (end 7.5 -7.5) (layer F.Fab) (width 0.15))
(fp_line (start 7.5 -7.5) (end 7.5 7.5) (layer F.Fab) (width 0.15))
(fp_line (start 7.5 7.5) (end -7.5 7.5) (layer B.Fab) (width 0.15))
(fp_line (start -7.5 7.5) (end -7.5 -7.5) (layer F.Fab) (width 0.15))
(fp_text user %V (at 0 8.255) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 -3.048) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 2 thru_hole circle (at 3.81 -2.54) (size 2.286 2.286) (drill 1.4986) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at -2.54 -5.08) (size 2.286 2.286) (drill 1.4986) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 2.54 -5.08) (size 2.286 2.286) (drill 1.4986) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 0 0) (size 3.9878 3.9878) (drill 3.9878) (layers *.Cu *.Mask))
(pad 1 thru_hole circle (at -3.81 -2.54) (size 2.286 2.286) (drill 1.4986) (layers *.Cu *.Mask))
)